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40055101TH Rev.4 413 /
A3.2.9 M17 Circuit Diagram (Page 10/17)
1. Block diagram
The circuit diagram shown on page 10/17 consists of connector CN2 that provides an interface
between M17 board and LED print head.
Figure A3.2.12 shows the related signals and block diagram of LED print head.
2. Function
Data of 1664 LEDs on the LED print head is loaded into the shift registers by the HCLCK (6.67
MHz) signal. After the 1664 bit (208mm) data is loaded in the shift registers, it is then loaded in
the latch circuit by the HLATCH signal. The turning -on and off of the LEDs are controlled by
STRB1-N to STRB4-N signals.
LED head interface signals output from IOGA
HDATA 0 : Print data i.e., data to be printed
HCLCK : Transfer clock for print data (6.67 MHz/10MHz)
HLATCH : Latch signal for print data
STRB1-N to STRB4-N: LED head strobe signals
Shift register
Latch
Strobe
CN2
8
6
9
10, 11, 12, 13
1, 2
3, 4
5, 14
+5 V
0 V
LED
1664 bits (208 mm)
LED print head
M17
HCLCK (6.67 MHz)
HDATA
HLATCH
STRB1-N to STRB4-N
0 VP
+5 V
0 V
IOGA
IC2
Figure A3.2.12 Related Signals and Block Diagram of LED Head
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